As integrated circuitry technology advances, the demand for increased packing density increases. High packing density is usually obtained through device shrinkage, which requires highly sophisticated processing techniques such as E-beam lithography, reactive ion etching, transient annealings, etc. Primarily, VLSI applications realize packing density through scaling down of device dimensions. In the planar dimension, the width and length of the various components are decreased to accommodate this density increase. In addition, the depth of the various structures such as oxides, impurity implants and metal interconnects must also be accounted for and a dimensional adjustment mode to insure proper operational characteristics.
In order to increase packing density for VLSI applications, it is necessary to decrease sheet resistance for the various conductive layers and also to reduce junction leakage current and impurity depth profiles for the various semiconductor junctions, such as the source/drain regions of the integrated circuit. To reduce sheet resistance over a semiconductor junction, one technique that is utilized is to silicide the surface by first depositing a refractory metal and then reacting it with the underlying silicon to form a silicide. The junctions are then formed by either implanting through the silicide after formation thereof or implanting prior to formation thereof. However, the higher reaction temperatures required to form the silicided junctions can present problems with respect to the integrity of the junction due to such things as segregation at the interface between the source/drain junction and the silicide layer, lateral straggle of the junction, etc. In addition, the silicide process and the implant process utilized to form the silicid.ed junction must be integrated into a given process flow without unduly complicating the process or unduly increasing the number of thermal cycles required for the overall process. Any increase in the number of thermal cycles may be a detriment to the performance of the device.